For the transmission or reception of data or commands, for example within a short range, a conventional transceiver uses FSK (frequency shift keying) modulation. If the RF carrier frequency is high, for example on the order of 2.4 GHz, a relatively high bandwidth is selected for the intermediate frequency, in particular, higher than or equal to 200 kHz. The modulation frequency deviation in the modulated signals can be adjusted according to the bandwidth. In such case, a reference frequency can be used, provided by a local oscillator, which may be not very precise and therefore inexpensive. However, account must be taken of thermal noise power, which is proportional to the selected bandwidth. Thus a wide-band transmission or reception system generally does not have excellent sensitivity.
The patent application EP 0 961 412 A1 discloses a frequency synthesizer for two-point frequency modulation for the transmission of data. This frequency synthesiser uses a sigma-delta modulator to modulate data by controlling a variable divider in the low frequency phase-locked loop (PLL), and a digital-to-analogue converter (DAC) for high frequency modulation. This DAC has a variable gain, which is adjusted by a digital control unit, and is controlled by a digital control signal for the data frequency modulation. This digital control signal is also transmitted to the sigma-delta modulator to combine the modulation of the low-frequency PLL and that provided by the DAC.
In the synthesiser, the relative delay of the modulation signal passing through the DAC is varied with respect to the modulation in the low-frequency PLL. However, there is nothing disclosed in this document regarding, for example, adjusting the amplitude level of the spectrum of data modulated by the low-frequency PLL and via the DAC converter. Undesired interference may therefore occur depending on the state transition frequency for the data transmission. Moreover, it is relatively complicated to adjust the DAC gain, which constitutes a drawback.
The patent EP 2 173 029 B1 discloses a self-calibration method for a frequency synthesiser using two-point FSK modulation for the transmission of data. The frequency synthesiser includes a first low-frequency phase locked loop (PLL) in which is placed a voltage-controlled oscillator, and a high frequency access, which includes a digital-to-analogue converter, connected to the voltage-controlled oscillator. The first PLL also includes a reference oscillator, a phase comparator connected to the reference oscillator, a first low-pass loop filter, and a multi-mode divider counter controlled by a modulator for supplying the phase comparator with a divided signal on the basis of a high frequency output signal from the synthesiser. The voltage-controlled oscillator is controlled at a first input by a first control voltage signal from the first loop filter, and at a second input by a second control voltage signal for modulating the high frequency data.
For the self-calibration method for the frequency synthesiser of the patent EP 2 173 029 B1, there is described a dichotomy algorithm for adjusting the gain of a DAC. A continuous voltage comparison is performed in another comparator to control a logic circuit for adjusting the DAC gain. All the operations for calibrating the DAC gain are performed in open loop mode in the first low-frequency PLL. Voltage drifts occur during closed loop operation. Consequently, this creates voltage differences and a phase shift in the signals to be filtered before the voltage-controlled oscillator during operation in closed loop mode after calibration. Moreover, it takes a long time to calibrate the synthesiser, which constitutes drawbacks.
There is also known a frequency synthesiser using two-point modulation, wherein the operations to calibrate the two-point modulator are performed by minimising the output power of the loop filter or of the DAC. In calibration mode, the output voltage of the loop filter can also be minimised by a least-mean square (LMS) algorithm controlling the DAC gain. This requires a complicated circuit structure, which constitutes a drawback.